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Results 1 to 25 of 750

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An alternative DFT methodology to test high-resolution ΣΔ modulatorsESCALERA, S; GARCIA-GONZALEZ, J. M; GUERRA, O et al.IEEE International Symposium on Circuits and Systems. 2004, pp 257-260, isbn 0-7803-8251-X, 4 p.Conference Paper

Improved architecture for low-distortion ΔΣ ADCsLEE, K; TEMES, G. C.Electronics letters. 2009, Vol 45, Num 14, pp 730-731, issn 0013-5194, 2 p.Article

Variable modulus delta-sigma modulation in fractional-N frequency synthesisBORKOWSKI, M. J; KOSTAMOVAARA, J.Electronics Letters. 2007, Vol 43, Num 25, pp 1399-1400, issn 0013-5194, 2 p.Article

A 1V 88dB 20kHz ΣΔ modulator in 90nm CMOSLIBIN YAO; STEYAERT, Michiel; SANSEN, Willy et al.IEEE International Solid-State Circuits Conference. 2004, pp 80-81, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

A 25MS/s 14b 200mW ΣΔ modulator in 0.18μm CMOSBALMELLI, Pio; QIUTING HUANG.IEEE International Solid-State Circuits Conference. 2004, pp 74-75, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Sigma-delta modulators operated in optimization modeYU, Shiang-Hwua; HU, Jwu-Sheng.IEEE International Symposium on Circuits and Systems. 2004, pp 1080-1083, isbn 0-7803-8251-X, 4 p.Conference Paper

Efficient floating double-sampling integrator for ΔΣ ADCsLEE, K; CHAE, J; TEMES, G. C et al.Electronics Letters. 2007, Vol 43, Num 25, pp 1413-1414, issn 0013-5194, 2 p.Article

A cascaded continuous-time ΣΔ modulator with 67dB dynamic range in 10MHz bandwidthBREEMS, Lucien J.IEEE International Solid-State Circuits Conference. 2004, pp 72-73, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Low-distortion delta-sigma topologies for mash architecturesSILVA, José; MOON, Un-Ku; TEMES, Gdbor C et al.IEEE International Symposium on Circuits and Systems. 2004, pp 1144-1147, isbn 0-7803-8251-X, 4 p.Conference Paper

A low-power decimation filter for a sigma-delta converter based on a power-optmized sinc filterGEROSA, Andrea; NEVIANI, Andrea.IEEE International Symposium on Circuits and Systems. 2004, pp 245-248, isbn 0-7803-8251-X, 4 p.Conference Paper

Sub-sampling Sigma-Delta modulator for baseband processingCHANDRASEKARAN, Srinivasaraman; BLACK, William C.Custom integrated circuits conference. 2002, pp 195-198, isbn 0-7803-7250-6, 4 p.Conference Paper

Design of single flux quantum multistage decimation filtersHASEGAWA, H; HASHIMOTO, T; NAGASAWA, S et al.Physica. C. Superconductivity and its applications. 2001, Vol 357-60, pp 1552-1556, 2Conference Paper

Low-consumption sigma-delta DAC for audio mobile applicationsBENABES, P; KIELBASA, R.Electronics Letters. 2008, Vol 44, Num 17, pp 1010-1011, issn 0013-5194, 2 p.Article

Controlled behaviour of STF in CT ΣΔ modulatorsDE MAEYER, J; RAMAN, J; ROMBOUTS, P et al.Electronics Letters. 2005, Vol 41, Num 16, pp 896-897, issn 0013-5194, 2 p.Article

A fourth-order ΣΔ interface for micromachined inertial sensorsPETKOV, Vladimir P; BOSER, Bernhard E.IEEE International Solid-State Circuits Conference. 2004, pp 320-321, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Structure and information content in sequences from the single-loop sigma-delta modulator with DC inputDACHSELT, Frank; QUITZK, Stefan.IEEE International Symposium on Circuits and Systems. 2004, pp 685-688, isbn 0-7803-8251-X, 4 p.Conference Paper

Asynchronous sigma―delta modulator with noise shapingWEI CHEN; PAPAVASSILIOU, C.Electronics letters. 2013, Vol 49, Num 24, pp 1520-1522, issn 0013-5194, 3 p.Article

Efficient digital single-bit resonatorTHOMPSON, A. C; HUSSAIN, Z. M; O'SHEA, P et al.Electronics Letters. 2004, Vol 40, Num 22, pp 1396-1397, issn 0013-5194, 2 p.Article

Multi-step extended-counting analogue-to-digital convertersCHEN, C.-H; JUNG, Y; CEBALLOS, J. L et al.Electronics letters. 2013, Vol 49, Num 1, pp 30-31, issn 0013-5194, 2 p.Article

Double-sampled ΔΣ modulator with relaxed feedback timingSHEN, W; TEMES, G. C.Electronics letters. 2009, Vol 45, Num 17, pp 875-877, issn 0013-5194, 3 p.Article

A third order sigma-delta modulatorMILOVANOVIC, D; SAVIC, M; NIKOLIC, M et al.International conference on microelectronics. 2004, isbn 0-7803-8166-1, 2Vol, vol 2, 605-608Conference Paper

Efficient technique for excess loop delay compensation in continuous-time ΔΣ modulatorsZHANG, Y; CHEN, C. H; TEMES, G. C et al.Electronics letters. 2013, Vol 49, Num 24, pp 1522-1523, issn 0013-5194, 2 p.Article

Fast and accurate jitter simulation technique for continuous-time ΣΔmodulatorsASHRY, A; ABOUSHADY, H.Electronics letters. 2009, Vol 45, Num 24, pp 1218-1219, issn 0013-5194, 2 p.Article

A 2.5V 14-bit ΣΔ CMOS-SOI capacitive accelerometerAMINI, Babak Vakili; POURKAMALI, Siavash; AYAZI, Farrokh et al.IEEE International Solid-State Circuits Conference. 2004, pp 314-315, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Power dissipation and gate number reduction of a utilized register, replaced by equivalent countersBABAII RIZVANDI, N; MOHSENI BARANDAGH, S. A; KHADEMZADEH, A et al.International conference on microelectronics. 2004, isbn 0-7803-8166-1, 2Vol, vol 2, 789-791Conference Paper

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